SH7720 Datasheet, PDF (1167/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
Start command sequence
FIFO clear
Execute CMD20 (CMDR to CMDSTRT)
Yes
Is CRCERI interrupt
generated?
No
No
Is CRPI interrupt
generated?
Yes
Read response register
Is response status
No
normal?
Yes
Set DMAC
Set DMACR (MMCIF)
No
Is FRDYI interrupt generated
or does DMA transfer end?
Yes
Write 1 to DATEN
No
Does DMA transfer
end?
Yes
Set DMACR to H'00
No
Is FEI interrupt
generated?
Yes
Write 1 to CMDOFF
Execute CMD12
No
Is CTERI interrupt
generated?
Yes
Write 1 to CMDOFF
Command sequence end
Figure 31.31 Operational Flowchart for Write Sequence (Stream Write Transfer)
Rev. 3.00 Jan. 18, 2008 Page 1105 of 1458
REJ09B0033-0300