SH7720 Datasheet, PDF (1307/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 37 List of Registers
Register Name
Abbreviation
FIFO data count register_1
SCFDR_1
Transmit FIFO data register_1
SCFTDR_1
Receive FIFO data register_1
SCFRDR_1
IrDA mode register
I²C bus control register 1
I²C bus control register 2
I²C bus mode register
I²C bus interrupt enable register
I²C bus status register
SCIMR
ICCR1
ICCR2
ICMR
ICIER
ICSR
Slave address register
SAR
I²C bus transmit data register
ICDRT
I²C bus receive data register
ICDRR
I²C bus master transfer clock select ICCKS
register
Mode register_0
SIMDR_0
Clock select register_0
SISCR_0
Transmit data assign register_0
SITDAR_0
Receive data assign register_0
SIRDAR_0
Control data assign register_0
SICDAR_0
Control register_0
SICTR_0
FIFO control register_0
SIFCTR_0
Status register_0
SISTR_0
Interrupt enable register_0
SIIER_0
Transmit data register_0
SITDR_0
Receive data register_0
SIRDR_0
Transmit control data register_0
SITCR_0
Receive control data register_0
SIRCR_0
Mode register_1
SIMDR_1
Clock select register_1
SISCR_1
Transmit data assign register_1
SITDAR_1
Receive data assign register_1
SIRDAR_1
Number
of Bits Address
16
H'A443 801C
8
H'A443 8020
8
H'A443 8024
16
H'A444 0000
8
H'A447 0000
8
H'A447 0004
8
H'A447 0008
8
H'A447 000C
8
H'A447 0010
8
H'A447 0014
8
H'A447 0018
8
H'A447 001C
8
H'A447 0020
16
H'A441 0000
16
H'A441 0002
16
H'A441 0004
16
H'A441 0006
16
H'A441 0008
16
H'A441 000C
16
H'A441 0010
16
H'A441 0014
16
H'A441 0016
32
H'A441 0020
32
H'A441 0024
32
H'A441 0028
32
H'A441 002C
16
H'A441 8000
16
H'A441 8002
16
H'A441 8004
16
H'A441 8006
Module
SCIF
IrDA
IIC
SIOF
Access
Size
16
8
8
16
8
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
16
16
32
32
32
32
16
16
16
16
Rev. 3.00 Jan. 18, 2008 Page 1245 of 1458
REJ09B0033-0300