SH7720 Datasheet, PDF (1017/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 28 D/A Converter (DAC)
28.3.2 D/A Control Register (DACR)
The DACR register is an 8-bit readable/writable register that controls D/A converter operation.
The DACR is initialized to H'3F at reset. Note that the DACR is not initialized in software
standby, module standby, or hardware standby mode.
Initial
Bit Bit Name Value R/W Description
7
DAOE1 0
R/W Controls D/A conversion for channel 1 and analog output.
0: D/A conversion for channel 1 and analog output (DA1)
are disabled
1: D/A conversion for channel 1 and analog output (DA1)
are enabled
6
DAOE0 0
R/W Controls D/A conversion for channel 0 and analog output.
0: D/A conversion for channel 0 and analog output (DA0)
are disabled
1: D/A conversion for channel 0 and analog output (DA0)
are enabled
5 to 0 
All 1
R
Reserved
These bits are always read as 1. The write value should
always be 1. If 0 is written to these bits, correct operation
cannot be guaranteed.
Rev. 3.00 Jan. 18, 2008 Page 955 of 1458
REJ09B0033-0300