SH7720 Datasheet, PDF (396/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 9 Bus State Controller (BSC)
Table 9.9 32-Bit External Device/Little Endian Access and Data Alignment
D31 to
Operation D24
Byte access 
at 0
Data Bus
D23 to
D16
D15 to
D8


D7 to
D0
Data
7 to 0
Strobe Signals
WE3(BE3), WE2(BE2), WE1(BE1), WE0(BE0),
DQMUU DQMUL DQMLU DQMLL


Assert
Byte access 
at 1
Byte access 
at 2
Byte access Data
at 3
7 to 0
Word access 
at 0
Word access Data
at 2
15 to 8
Longword Data
access at 0 31 to 24

Data
7 to 0


Data
7 to 0
Data
23 to 16
Data
7 to 0


Data
15 to 8

Data
15 to 8





Assert
Data
7 to 0


Assert
Data Assert
7 to 0

Assert


Assert
Assert
Assert


Assert

Assert



Assert

Assert
Rev. 3.00 Jan. 18, 2008 Page 334 of 1458
REJ09B0033-0300