SH7720 Datasheet, PDF (849/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 24 USB Host Controller (USBH)
24.3.19 Hc Rh Descriptor A Register (USBHRDA)
USBHRDA is the first register of two registers describing the features of the root hub. The reset
value is implementation specific. The descriptor length (11), descriptor type (TBD), and the hub
controller current bit (0) of Class Descriptor of the hub are emulated by HCD. All other bits are
placed in USBHRDA and USBHRDB.
Bit
Bit Name
31
POTPGT7
30
POTPGT6
29
POTPGT5
28
POTPGT4
27
POTPGT3
26
POTPGT2
25
POTPGT1
24
POTPGT0
23 to 13 
12
NOCP
11
OCPM
10
DT
Initial
Value R/W Description
0
R/W Power On To Power Good Time
0
R/W These bits specify the time required for waiting before
0
R/W ^{accessing the power-on port of the root hub. These bits}
are implementation specific. The unit of time is 2 ms. The
0
R/W _{time is calculated as POTPGT × 2 ms.}
0
R/W
0
R/W
1
R/W
0
R/W
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
1
R/W No Over Current Protection
This bit selects how the over-current status of the root hub
is reported. When this bit is cleared, the OCPM bit
specifies global report or report at each port.
0: Over-current status is collectively reported for all
downstream ports
1: Over-current protection is not supported
0
R/W Over Current Protection Mode
This bit selects how the over-current status in the root-hub
port is reported. At reset, this bit reflects the same mode of
PowerSwitchingMode. When the NOCP bit is cleared, this
bit is valid.
0: Over-current status is collectively reported for all
downstream ports
1: Over-current protection is not supported
0
R Device Type
This bit indicates that the USB Host Controller is not a
compound device. Always set this bit to 0.
Rev. 3.00 Jan. 18, 2008 Page 787 of 1458
REJ09B0033-0300