SH7720 Datasheet, PDF (792/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 21 Serial I/O with FIFO (SIOF)
(2) 8-bit Monaural Data (2)
Synchronous pulse method, falling edge sampling, slot No.0 used for transmit and receive data,
and frame length = 16 bits
1 frame
SIOFSCK
SIOFSYNC
SIOFTxD
SIOFRxD
L-channel data
Slot No.0
Slot No.1
1-bit delay
Specifications: _{TRMD[1:0]=00 or 10,} REDG=0,
FL[3:0]=0100 (frame length: 16 bits)
TDLE=1,
TDLA[3:0]=0000, TDRE=0, _{TDRA[3:0]=0000,}
RDLE=1,
RDLA[3:0]=0000, RDRE=0, _{RDRA[3:0]=0000,}
CD0E=0,
CD0A[3:0]=0000, CD1E=0, _{CD1A[3:0]=0000}
Figure 21.14 Transmit and Receive Timing (8-Bit Monaural Data (2))
(3) 16-bit Monaural Data (1)
Synchronous pulse method, falling edge sampling, slot No.0 used for transmit and receive data,
and frame length = 64 bits
1 frame
SIOFSCK
SIOFSYNC
SIOFTxD
SIOFRxD
L-channel data
Slot No.0
Slot No.1
Slot No.2
Slot No.3
1-bit delay
Specifications: TRMD[1:0]=00 or 10, REDG=0,
TDLE=1,
TDLA[3:0]=0000,
RDLE=1,
RDLA[3:0]=0000,
CD0E=0,
CD0A[3:0]=0000,
FL[3:0]=1101 (frame length: 64 bits)
TDRE=0,
TDRA[3:0]=0000,
RDRE=0,
RDRA[3:0]=0000,
CD1E=0,
CD1A[3:0]=0000
Figure 21.15 Transmit and Receive Timing (16-Bit Monaural Data (1))
Rev. 3.00 Jan. 18, 2008 Page 730 of 1458
REJ09B0033-0300