SH7720 Datasheet, PDF (633/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 17 Realtime Clock (RTC)
17.3.11 Hour Alarm Register (RHRAR)
RHRAR is an alarm register corresponding to the BCD coded hour counter RHRCNT of the RTC.
When the ENB bit is set to 1, a comparison with the RHRCNT value is performed. From among
RSECAR/RMINAR/RHRAR/RWKAR/RDAYAR/RMONAR/RCR3, the counter and alarm
register comparison is performed only on those with ENB bits set to 1, and if each of those
coincide, an alarm flag of RCR1 is set to 1.
The range of hour alarm which can be set is 00 to 23 (decimal). Errant operation will result if any
other value is set.
The ENB bit in RHRAR is initialized by a power-on reset. The remaining RHRAR fields are not
initialized by a power-on reset or manual reset, or in standby mode.
Bit
7
6
5, 4
3 to 0
Bit Name
ENB
Initial Value R/W
0
R/W

0
R

Undefined R/W

Undefined R/W
Description
When this bit is set to 1, a comparison with the
RHRCNT value is performed.
Reserved
This bit is always read as 0. The write value
should always be 0.
Ten’s position of hours setting value
One’s position of hours setting value
Rev. 3.00 Jan. 18, 2008 Page 571 of 1458
REJ09B0033-0300