SH7720 Datasheet, PDF (1145/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Command sequence start
FIFO clear
Write transfer block size to TBCR
Execute CMD16
No
Does CMD16 end
successfully?
Yes
Execute CMD25 (CMDR to CMDSTRT)
Section 31 MultiMediaCard Interface (MMCIF)
Yes
Is CRCERI interrupt
generated?
No
No
Is CRPI interrupt
generated?
Yes
Read response register
Is response status
No
normal?
Yes
No
Is CTERI interrupt
generated?
Yes
[1]
[2]
Figure 31.20 Operational Flowchart for Commands with Write Data
(Open-ended Multiblock Transfer) (1)
Rev. 3.00 Jan. 18, 2008 Page 1083 of 1458
REJ09B0033-0300