SH7720 Datasheet, PDF (1238/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 34 Pin Function Controller (PFC)
34.1.22 Pin Select Register D (PSELD)
PSELD is a 16-bit readable/writable register that selects the pin functions multiplexing two or
more other functions.
To use one of other functions in the pin multiplexing two or more other functions, the port control
register should be set as other functions after setting the corresponding bit in PSELD.
Initial
Bit
Bit Name Value
R/W Description
15

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PSELD14 0
13
PSELD13 0
R/W MMC_DAT/SIOF1_TxD/SD_DAT0/TPU_TI3A Select
R/W ^{as PTU2 Other Functions}
00: Select SIOF1_TxD
01: Select TPU_TI3A
10: Select MMC_DAT
11: Select according to PSELB0 setting
Reserved when PSELB0 = 0
Select SD_DAT0 when PSELB0 = 1
12
PSELD12 0
R/W Pin SD_DAT0 Control when PSELD[14:13] = B'11
0: Pins are not controlled
1: Pins are controlled
SD_DAT0: Pulled up
11

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 3.00 Jan. 18, 2008 Page 1176 of 1458
REJ09B0033-0300