SH7720 Datasheet, PDF (1037/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 29 PC Card Controller (PCC)
Bit
Bit Name Initial Value R/W Description
0
P0BDE 0
R/W PCC0 Battery Dead Enable
When the PC card connected to area 6 is on the IC
memory card interface, bit 0 enables or disables the
interrupt request when the BVD2 and BVD1 are in the
state in which "the battery must be changed since the
data is not guaranteed". This bit has no meaning on the
I/O card interface.
0: No interrupt occurs when the BVD2 and BVD1 are in
the state in which "the battery must be changed since
the data is not guaranteed"
1: An interrupt occurs when the BVD2 and BVD1 are in
the state in which "the battery must be changed since
the data is not guaranteed"
Rev. 3.00 Jan. 18, 2008 Page 975 of 1458
REJ09B0033-0300