SH7720 Datasheet, PDF (1280/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 36 User Debugging Interface (H-UDI)
TDI
SDBPR
TDO
MUX
SDIR
SDID
TCK
TMS
TRST
TAP controller
Decoder
[Legend]
SDBPR: Bypass register
SDBSR: Boundary scan register
SDIR: Instruction register
SDID: ID register
Figure 36.1 Block Diagram of H-UDI
Local
bus
36.2 Input/Output Pins
Table 36.1 shows the pin configuration of the H-UDI.
Rev. 3.00 Jan. 18, 2008 Page 1218 of 1458
REJ09B0033-0300