SH7720 Datasheet, PDF (25/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

25.3.17 EP0o Data Register (EPDR0o) ............................................................................. 821
25.3.18 EP0s Data Register (EPDR0s) .............................................................................. 821
25.3.19 EP1 Data Register (EPDR1) ................................................................................. 822
25.3.20 EP2 Data Register (EPDR2) ................................................................................. 822
25.3.21 EP3 Data Register (EPDR3) ................................................................................. 822
25.3.22 EP4 Data Register (EPDR4) ................................................................................. 823
25.3.23 EP5 Data Register (EPDR5) ................................................................................. 823
25.3.24 EP0o Receive Data Size Register (EPSZ0o) ........................................................ 823
25.3.25 EP1 Receive Data Size Register (EPSZ1) ............................................................ 824
25.3.26 EP4 Receive Data Size Register (EPSZ4) ............................................................ 824
25.3.27 Trigger Register (TRG)......................................................................................... 824
25.3.28 Data Status Register (DASTS).............................................................................. 825
25.3.29 FIFO Clear Register 0 (FCLR0) ........................................................................... 825
25.3.30 FIFO Clear Register 1 (FCLR1) ........................................................................... 826
25.3.31 DMA Transfer Setting Register (DMA) ............................................................... 826
25.3.32 Endpoint Stall Register 0 (EPSTL0)..................................................................... 827
25.3.33 Endpoint Stall Register 1 (EPSTL1)..................................................................... 828
25.3.34 Configuration Value Register (CVR) ................................................................... 828
25.3.35 Time Stamp Register (TSRH/TSRL).................................................................... 829
25.3.36 Control Register 0 (CTLR0) ................................................................................. 830
25.3.37 Control Register 1 (CTLR1) ................................................................................. 831
25.3.38 Endpoint Information Register (EPIR) ................................................................. 831
25.3.39 Timer Register (TMRH/TMRL) ........................................................................... 836
25.3.40 Set Time Out Register (STOH/STOL).................................................................. 836
25.4 Operation ........................................................................................................................... 837
25.4.1 Cable Connection.................................................................................................. 837
25.4.2 Cable Disconnection ............................................................................................. 838
25.4.3 Control Transfer.................................................................................................... 839
25.4.4 EP1 Bulk-Out Transfer (Dual FIFOs)................................................................... 845
25.4.5 EP2 Bulk-In Transfer (Dual FIFOs) ..................................................................... 846
25.4.6 EP3 Interrupt-In Transfer...................................................................................... 848
25.5 EP4 Isochronous-Out Transfer........................................................................................... 849
25.6 EP5 Isochronous-In Transfer ............................................................................................. 852
25.7 Processing of USB Standard Commands and Class/Vendor Commands........................... 855
25.7.1 Processing of Commands Transmitted by Control Transfer ................................. 855
25.8 Stall Operations.................................................................................................................. 856
25.8.1 Overview............................................................................................................... 856
25.8.2 Forcible Stall by Application ................................................................................ 856
25.8.3 Automatic Stall by USB Function Controller ....................................................... 858
Rev. 3.00 Jan. 18, 2008 Page xxv of lxii