SH7720 Datasheet, PDF(1472/1524 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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SH7720 Datasheet, PDF (1472/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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Item

Page Revision (See Manual for Details)

13.3.5 Standby Control Register 5 486 Amended and notes added

(STBCR5)

Bit Bit Name Description

7ï£§

Reserved

This bit is always read as 0. The write value

should always be 0.

6 MSTP56 Module Stop Bit 56

When the MSTP56 bit is set to 1, the supply of

the clock to the SDHI is halted.

0: Clock supply to SDHI halted

1: SDHI operates

Note: On the models not having the SDHI, this

bit is reserved and is always read as 0.

The write value should always be 0.

2 MSTP52 Module Stop Bit 52

When the MSTP52 bit is set to 1, the supply of

the clock to the SSL is halted.

0: SSL operates

1: Clock supply to SSL halted

Note: On the models not having the SSL, this bit

is reserved. The write value should always

be 1.

13.5 Software Standby Mode

13.5.2 Canceling Software

Standby Mode

489, Changed

490 Software standby mode is canceled by interrupts (NMI,

IRQ (edge detection), RTC, TMU, and PINT) or a reset.

(1) Canceling with Interrupt

The on-chip WDT can be used for hot starts. When the

chip detects an NMI, IRQ (edge detection)*1, RTC*1,

TMU*1, or PINT*1 interrupt,â¦

Notes: 1. Only when the RTC is used, software

standby mode can be canceled by IRQ (edge

detection), RTC, TMU, or PINT interrupt.

Rev. 3.00 Jan. 18, 2008 Page 1410 of 1458

REJ09B0033-0300

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