SH7720 Datasheet, PDF (528/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 11 Clock Pulse Generator (CPG)
11.6 Usage Notes
Note the following when using the USBH and USBF.
1. When the USBH and USBF are not used, it is recommended that UCLKCR should be cleared
to H'00 to halt the clock.
2. Halt the USBH and USBF modules before changing the value of UCLKCR. This is done by
selecting the "Clock stopped" setting with the module stop bit 31 (USBH module stop) and
module stop bit 30 (USBF module stop) in STBCR3.
3. UCLKCR is initialized only by a power-on reset. In a manual reset, it retains its current set
values.
4. When using the USBH/USBF, be sure to set the peripheral clock (Pφ) to a frequency higher
than 13 MHz.
5. When using the USBH, be sure to set the bus clock (Bφ) to a frequency higher than 32 MHz.
11.7 Notes on Board Design
(1) When Using an External Crystal Resonator
Place the crystal resonator, capacitors CL1 and CL2, and damping resistor R close to the EXTAL
and XTAL pins. To prevent induction from interfering with correct oscillation, use a common
grounding point for the capacitors connected to the resonator, and do not locate a wiring pattern
near these components.
Rev. 3.00 Jan. 18, 2008 Page 466 of 1458
REJ09B0033-0300