SH7720 Datasheet, PDF (395/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 9 Bus State Controller (BSC)
Table 9.8 8-Bit External Device/Big Endian Access and Data Alignment
Data Bus
Strobe Signals
Operation
D31 to D23 to D15 to D7 to WE3(BE3), WE2(BE2), WE1(BE1), WE0(BE0),
D24 D16 D8 D0
DQMUU DQMUL DQMLU DQMLL
Byte access at 0



Data 


Assert
7 to 0
Byte access at 1



Data 


Assert
7 to 0
Byte access at 2



Data 


Assert
7 to 0
Byte access at 3



Data 


Assert
7 to 0
Word
1st time 


Data 


Assert
access at 0 at 0
15 to 8
2nd time 


Data 


Assert
at 1
7 to 0
Word
1st time 


Data 


Assert
access at 2 at 2
15 to 8
2nd time 


Data 


Assert
at 3
7 to 0
Longword 1st time 


Data 


Assert
access at 0 at 0
31 to 24
2nd time 


Data 


Assert
at 1
23 to 16
3rd time 


Data 


Assert
at 2
15 to 8
4th time 


Data 


Assert
at 3
7 to 0
Rev. 3.00 Jan. 18, 2008 Page 333 of 1458
REJ09B0033-0300