SH7720 Datasheet, PDF (518/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 11 Clock Pulse Generator (CPG)
(7) Frequency Control Register
The frequency control register has control bits assigned for the following functions: clock
output/non-output from the CKIO pin, the frequency multiplication ratio of PLL circuit 1, and the
frequency division ratio of the internal clock and the peripheral clock.
(8) Standby Control Register
The standby control register has bits for controlling the power-down modes. See section 13,
Power-Down Modes, for more information.
(9) USBH/USBF Clock Control Register
The USBH/USBF clock control register specifies a signal source for generation of the
USBH/USBF clock.
Rev. 3.00 Jan. 18, 2008 Page 456 of 1458
REJ09B0033-0300