SH7720 Datasheet, PDF (851/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 24 USB Host Controller (USBH)
24.3.20 Hc Rh Descriptor B Register (USBHRDB)
USBHRDB is the second register of two registers describing the features of the root hub. These
bits are written during the initial setting so as to correspond to the system implementation. The
reset value is implementation specific.
Initial
Bit
Bit Name Value R/W Description
31 to 16 PPCM15 to All 0
PPCM0
R/W Port Power Control Mask
This bit indicates that the port is influenced by the global
power-control command when the PSM bit in the
USBHRDA register is set. When this bit is set, the power
state of the port is affected by the power control at each
port (set/clear port power). When this bit is cleared, the
port is controlled by the global power switch (set/clear
global power). If the device is placed in the global
switching mode (PSM = 0), this bit is not valid.
Bit 31: Port#15 power mask
:
Bit 18: Port#2 power mask
Bit 17: Port#1 power mask
Bit 16: Reserved
Note: Clear the NPS of the USBHRDA register so that
the power to all ports is OFF (Port Power Status =
0), then set this bit.
15 to 0 DR15 to
DR0
All 0 R/W Device Removable
These bits are dedicated to the ports of the root hub.
When these bits are cleared, the set device becomes
removable. When these bits are set, do not remove the set
device.
Bit 15: Device affixed to Port#15
:
Bit 2: Device affixed to Port#2
Bit 1: Device affixed to Port#1
Bit 0: Reserved
Rev. 3.00 Jan. 18, 2008 Page 789 of 1458
REJ09B0033-0300