SH7720 Datasheet, PDF (1075/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 30 SIM Card Module (SIM)
Initialization
Clear the TE and RE bits in SCSCR to 0
(1)
Clear the ERS, PER, ORER, and
(2)
WAIT_ER flags in SCSSR to 0
Set the parity using the O/E bit in SCSMR (3)
Set the LCB, PB, SMIF, SDIR, and
(4)
SINV bits in SCSCMR
Set SCBRR
(5)
Set the clock using the CKE1 and CKE0
bits in SCSCR. Clear the TIE, RIE,
(6)
TE, RE, TEIE, and WAIT_IE flags to 0.
Wait
Has a 1-bit
No
interval elapsed?
Yes
Set the TIE, RIE, TE, and RE bits in SCSCR (7)
End
Figure 30.4 Example of Initialization Flow
Rev. 3.00 Jan. 18, 2008 Page 1013 of 1458
REJ09B0033-0300