SH7720 Datasheet, PDF (1384/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 38 Electrical Characteristics
38.4.3 AC Bus Timing
Table 38.9 Bus Timing
Conditions: Clock Mode 0, V_CCQ = 2.7 to 3.6 V, V_CCQ1 = 2.7 to 3.6 V or 1.65 to 1.95 V,
V_CC = 1.4 to 1.6 V, Ta = –20 to 75°C
66.67 MHz
Item
Symbol Min.
Max.
Unit Figure
Address delay time 1
t_AD1
Address delay time 2
t_AD2
Address delay time 3
t_AD3
Address setup time
t
AS
Address hold time
t
AH
BS delay time
t_BSD
CS delay time 1
t_CSD1
1
1/2t_cyc
1/2t_cyc
0
0

1
13
ns
1/2t
cyc
+
13
ns
1/2t
cyc
+
13
ns

ns

ns
13
ns
13
ns
38.12 to 38.42
38.19
38.12 to 38.19
38.12, 38.13
38.12 to 38.36, 38.37, 38.38
38.12 to 38.36,
38.37 to 38.42
CS delay time 2
t_CSD2
Read/write delay time 1 t_RWD1
1/2t_cyc
1
1/2t
cyc
+
13
ns
13
ns
38.12 to 38.36,
38.37 to 38.42
Read/write delay time 2 t_RWD2
Read strobe delay time t_RSD
Read data setup time 1 t
RDS1
1/2t_cyc
1/2t
cyc
+
13
ns
1/2t_cyc
1/2t
cyc
+
13
ns
1/2t + 10
cyc

ns
38.12 to 38.19, 38.39, 38.40
38.12 to 38.18,
38.37 to 38.42
Read data setup time 2 t_RDS2
7

ns 38.20 to 38.23, 38.28 to
38.30, 38.37, 38.38
Read data setup time 3 t
RDS3
Read data setup time 4 t_RDS4
Read data hold time 1 t_RDH1
1/2t
cyc
+
10

1/2t
cyc
+
10

0

ns 38.19
ns
ns 38.12 to 38.18,
38.37 to 38.42
Read data hold time 2 t_RDH2
2

ns 38.20 to 38.23, 38.28 to
38.30, 38.37, 38.38
Read data hold time 3 t
RDH3
Read data hold time 4 t
RDH4
Write enable delay time 1 t_WED1
Write enable delay time 2 t_WED2
0

ns
1/2t
cyc
+
10

ns
1/2t_cyc
1/2t
cyc
+
13
ns

13
ns
38.19
38.12 to 38.17, 38.39, 38.40
38.18
Rev. 3.00 Jan. 18, 2008 Page 1322 of 1458
REJ09B0033-0300