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| SH7720 Datasheet, PDF (1405/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series | |||
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Section 38 Electrical Characteristics
Tr
Tc1
Tc2
Tc3
Tc4
Tc5
Tc6
Tc7
Tc8
CKIO
A23 to A0
A12/A11*1
CSn
RD/WR
RAS
CAS
DQMx
D15 to D0
BS
CKE
DACKn*2
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
Row
Column Column Column Column Column Column Column Column
Address Address1 Address2 Address3 Address4 Address5 Address6 Address7 Address8
tAD1
tAD1
tAD1
tCSD1
WRITE
Command
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tRWD1
tRASD1
tCASD1
tCASD1
tCASD1
tDQMD1
tDQMD1
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tWDD2
tBSD
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tWDH2
tBSD
tDACD
(High)
tDACD
Notes: 1. Address pin that is connected to A10 of SDRAM
2. Waveform when active low is specified for DACKn
Figure 38.31 Burst Write Bus Cycle of SDRAM (Single Write à 8)
(Bank Active Mode: ACTV + WRIT Command, TRCD = 1 Cycle)
Rev. 3.00 Jan. 18, 2008 Page 1343 of 1458
REJ09B0033-0300
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