SH7720 Datasheet, PDF (655/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Serial Communication Interface with FIFO (SCIF)
Bit
Bit Name Initial Value R/W Description
4
O/E
0
R/W Parity Mode
Selects even or odd parity when parity bits are added
and checked. The O/E setting is used only when the
PE is set to 1 to enable parity addition and check. The
O/E setting is ignored when parity addition and check
is disabled.
0: Even parity*¹
1: Odd parity*²
Notes: 1. If even parity is selected, the parity bit is
added to transmit data to make an even
number of 1s in the transmitted character
and parity bit combined. Receive data is
checked to see if it has an even number of
1s in the received character and parity bit
combined.
2. If odd parity is selected, the parity bit is
added to transmit data to make an odd
number of 1s in the transmitted character
and parity bit combined. Receive data is
checked to see if it has an odd number of
1s in the received character and parity bit
combined.
Rev. 3.00 Jan. 18, 2008 Page 593 of 1458
REJ09B0033-0300