SH7720 Datasheet, PDF (1502/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Item
Table 36.3 Pins and Boundary
Scan Register Bits
36.3.5 ID Register (SDID)
Page Revision (See Manual for Details)
1222, Changed
1225,
1226,
Bit
Pin Name
I/O
1227 ³⁹⁵
RD/WR
OUT
389
WE1/DQMLU/WE
OUT
354
RD/WR
Control
348
WE1/DQMLU/WE
Control
194
SCIF0_RxD/IrRX/PTT1 IN
193
SCIF0_TxD/IrTX/PTT2 IN
155
SCIF0_RxD/IrRX/PTT1 OUT
154
SCIF0_TxD/IrTX/PTT2 OUT
117
SCIF0_RxD/IrRX/PTT1 Control
116
SCIF0_TxD/IrTX/PTT2 Control
1230 Deleted and changed`
Bit Bit Name
31 DID31 to
to 0 DID0
Description
Device ID31 to ID0
Device ID register that is stipulated by
JTAG.
H'002F200F (initial value) for this
SH7720 Group.
H'002F2447 (initial value) for this
SH7721 Group.
Upper four bits may be changed by the
chip version.
SDIDH corresponds to bits 31 to 16.
SDIDL corresponds to bits 15 to 0.
Rev. 3.00 Jan. 18, 2008 Page 1440 of 1458
REJ09B0033-0300