SH7720 Datasheet, PDF (814/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 22 Analog Front End Interface (AFEIF)
22.4.3 DAA Interface
Figure 22.7 shows the blocks diagram of DAA circuit. Ringing detect and dial pulse sending
sequence are described below.
AFE_RLYCNT
Hyblid circuit
AFEIF
AFE
(STLC7550)
Hook relay
DC holding
circuit
Tip
Ring
AFE_RDET
Ringing detector
Figure 22.7 DAA Block Diagram
(1) Ringing Detect Sequence
After the first ringing interrupt occurs, counting starts with writing 1 into RCEN bit of CTR2.
AFE must be operating before counting, because periodic counter counts AFE_FS from falling
edge to next falling edge.
The value of RCNTV register is effective only after 2nd interrupt generation, because the value of
RCNTV register is transferred from counter with a trigger of ending of 1st period cycle.
RCNTV will be 258 H (600 in decimal) if ringing cycle is 16 Hz and counted by 9600 Hz which is
default value of AFE_FS. Figure 22.8 shows detecting sequence of ringing.
Rev. 3.00 Jan. 18, 2008 Page 752 of 1458
REJ09B0033-0300