SH7720 Datasheet, PDF (174/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Table 3.13 Single Data Transfer Instruction Formats
Type
Mnemonic
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Single data MOVS.W @-As,Ds
transfer _{MOVS.W @As,Ds}
1 1 1 1 0 1 As
Ds 0:(*)
0:R4
1:(*)
0000
01
MOVS.W @As+,Ds
1:R5
2:(*)
10
MOVS.W @As+Is,Ds
2:R2
3:(*)
11
MOVS.W Ds,@-As
3:R3
4:(*)
0001
MOVS.W Ds,@As
5:A1
01
MOVS.W Ds,@As+
6:(*)
10
MOVS.W Ds,@As+Is
7:A0
11
MOVS.L @-As,Ds
8:X0
0010
MOVS.L @As,Ds
9:X1
01
MOVS.L @As+,Ds
A:Y0
10
MOVS.L @As+Is,Ds
B:Y1
11
MOVS.L Ds,@-As
C:M0 0 0 1 1
MOVS.L Ds,@As
D:A1G 0 1
MOVS.L Ds,@As+
E:M1
10
MOVS.L Ds,@As+Is
Note: * Codes reserved for system use.
F:A0G 1 1
Rev. 3.00 Jan. 18, 2008 Page 112 of 1458
REJ09B0033-0300