SH7720 Datasheet, PDF (1110/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
• INTCR1
Initial
Bit
Bit Name Value R/W Description
7
INTRQ2E 0
R/W int_err_n Interrupt Enable
0: Disables int_err_n interrupt
1: Enables int_err_n interrupt
6
INTRQ1E 0
R/W int_tran_n Interrupt Enable
0: Disables int_tran_n interrupt
1: Enables int_tran_n interrupt
5
INTRQ0E 0
R/W int_fstat_n Interrupt Enable
0: Disables int_fstat_n interrupt
1: Enables int_fstat_n interrupt
4

0
 Reserved
This bit is always read as 0. The write value should always
be 0.
3
WRERIE 0
R/W Write Error Flag Enable
0: Disables write error flag setting
1: Enables write error flag setting
2
CRCERIE 0
R/W CRC Error Flag Enable
0: Disables CRC error flag setting
1: Enables CRC error flag setting
1
DTERIE 0
R/W Data Timeout Error Flag Enable
0: Disables data timeout error flag setting
1: Enables data timeout error flag setting
0
CTERIE 0
R/W Command Timeout Error Flag Enable
0: Disables command timeout error flag setting
1: Enables command timeout error flag setting
Rev. 3.00 Jan. 18, 2008 Page 1048 of 1458
REJ09B0033-0300