SH7720 Datasheet, PDF (1144/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
Command sequence start
FIFO clear
Write transfer block size to TBCR
Execute CMD16
No
Does CMD16 end
successfully?
Yes
Execute CMD24 (CMDR to CMDSTRT)
Is CRCERI interrupt ^Yes
generated?
No
Is CRPI interrupt
No
generated?
Yes
Read response register
No
Is response status
normal?
Yes
Write data to FIFO
Write 1 to DATAEN
No
Is CTERI interrupt
generated?
Yes
No
Is FEI interrupt
generated?
Yes
No
Cap × n(FEI) ≥ Len *
Yes
Is DTI interrupt
generated?
No
Yes
Is CRCERI interrupt
Yes
generated?
No
Is DTERI interrupt
Yes
generated?
No
No
Is DRPI interrupt
generated?
Yes
Is DTBUSY
No
detected?
Yes
No
Is DBSYI interrupt is
generated?
Yes
Command sequence end
Write1 to CMDOFF
Note: * Len: Block length (byte)
Cap: FIFO size (byte)
n(FEI): The number of FEIs
from the start of write sequence
Figure 31.19 Operational Flowchart for Commands with Write Data
(Single Block Transfer)
Rev. 3.00 Jan. 18, 2008 Page 1082 of 1458
REJ09B0033-0300