SH7720 Datasheet, PDF (309/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 8 Interrupt Controller (INTC)
8.3.1 Interrupt Priority Registers A to J (IPRA to IPRJ)
IPRA to IPRJ are 16-bit readable/writable registers in which priority levels from 0 to 15 are set for
on-chip peripheral module and IRQ interrupts.
Bit
Bit Name Initial Value R/W Description
15
IPR15
0
14
IPR14
0
R/W These bits set the priority level for each interrupt
R/W ^{source in 4-bit units. For details, see table 8.2.}
13
IPR13
0
R/W
12
IPR12
0
R/W
11
IPR11
0
R/W
10
IPR10
0
R/W
9
IPR9
0
R/W
8
IPR8
0
R/W
7
IPR7
0
R/W
6
IPR6
0
R/W
5
IPR5
0
R/W
4
IPR4
0
R/W
3
IPR3
0
R/W
2
IPR2
0
R/W
1
IPR1
0
R/W
0
IPR0
0
R/W
Rev. 3.00 Jan. 18, 2008 Page 247 of 1458
REJ09B0033-0300