SH7720 Datasheet, PDF (176/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
Tables 3.14 and 3.15 show the data type of registers used in DSP instructions. Some instructions
cannot use some registers shown in the tables because of instruction code limitations. For
example, PMULS can use A1 as the source register, but cannot use A0. These tables ignore details
of register selectability.
Table 3.14 Destination Register in DSP Instructions
Guard Bits
Register Bits
Registers Instructions
39
32 31
16 15
0
A0, A1
DSP
Fixed-point, PSHA,
operation PMULS
Sign-extended
40-bit result
Integer, PDMSB
Sign-extended 24-bit result Cleared
Logical, PSHL
Cleared
16-bit result Cleared
Data
transfer
MOVS.W
MOVS.L
Sign-extended 16-bit data Cleared
Sign-extended
32-bit data
A0G, A1G Data
transfer
MOVS.W
MOVS.L
Data
Data
No update
No update
X0, X1
Y0, Y1
M0, M1
DSP
operation
Fixed-point, PSHA,
PMULS
Integer, logical,
PDMSB, PSHL
32-bit result
16-bit result Cleared
Data
transfer
MOVX/Y.W, MOVS.W
MOVS.L
16-bit result Cleared
32-bit data
Rev. 3.00 Jan. 18, 2008 Page 114 of 1458
REJ09B0033-0300