SH7720 Datasheet, PDF (1386/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 38 Electrical Characteristics
38.4.4 Basic Timing
CKIO
A25 to A0
CSn
RD/WR
RD
Read
D31 to D0
Write
WEn
D31 to D0
BS
DACKn*
WAIT
T1
T2
t_AD1
t_CSD1 t_AS
t_RWD1
t_AD1
t_CSD1
tRWD1
tRSD
tRSD
tAH
t_RDH1
t_RDS1
tWED1
tWED1 _tAH
t_WDD1
t_WDH1
t_BSD
t_BSD
t_WDH4
tDACD
t_WTH1
tWTS1
tDACD
Note: * Waveform when active low is specified for DACKn.
Figure 38.12 Basic Bus Cycle in Normal Space (No Wait)
Rev. 3.00 Jan. 18, 2008 Page 1324 of 1458
REJ09B0033-0300