SH7720 Datasheet, PDF (914/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 25 USB Function Controller (USBF)
25.6 EP5 Isochronous-In Transfer
USB function
SOF reception
Interrupt request (SOF)
Data in FIFO B side
No
has been transmitted?
Yes
Set EP5 transmit flag
(IFR3/EP5 TR = 1)
FIFO buffer
switch over
In-token reception
FIFO A side
Valid data
in EP5 FIFO?
Yes
Data transmission
to host
Set EP5 transmit
request flag
No
(IFR3/EP5 TR = 1)
0-byte data
transmission
SOF reception
Data in FIFO A side
has been transmitted?
Yes
Set EP5 transmit flag
(IFR3/EP5 TR = 1)
Interrupt request (SOF)
No
FIFO buffer
switch over
In-token reception
FIFO B side
Valid data
in EP5 FIFO?
Set EP5 transmit
request flag
No _{(IFR3/EP5 TR = 1)}
Yes
Data transmission
to host
0-byte data
transmission
Firmware
Clear SOF packet detection
flag (IFR2/SOF = 0)
Read time stamp register
H, L (TSRH, TSRL)
To figure
No
Time stamps
match?
25.17
B
Yes
FIFO B side
Write one packet
of data to EP5 data
register (EPDR5)
Clear SOF packet detection
flag (IFR2/SOF = 0)
Read time stamp register
H, L (TSRH, TSRL)
To figure
No
Time stamps
match?
25.17
B
Yes
FIFO A side
Write one packet
of data to EP5 data
register (EPDR5)
Figure 25.16 EP5 Isochronous-In Transfer Operation (SOF is Normal)
Rev. 3.00 Jan. 18, 2008 Page 852 of 1458
REJ09B0033-0300