SH7720 Datasheet, PDF (1100/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
• CMDR1 to CMDR4
Initial
Bit
Bit Name Value R/W Description
7 to 0 CMDR1 to All 0
CMDR4
R/W Command arguments
See specifications for the MMC.
• CMDR5
Bit
7 to 1
0
Initial
Bit Name Value
CRC
All 0
End
0
R/W Description
 This bit is unnecessary to be set, and is always read as 0.
 This bit is unnecessary to be set, and is always read as 0.
31.3.7 Response Registers 0 to 16 and D (RSPR0 to RSPR16 and RSPRD)
RSPR0 to RSPR16 are seventeen 8-bit command response registers. RSPRD is a 5-bit data
register.
The number of command response bytes differs according to the command. The number of
command response bytes can be specified by the response type register (RSPTYR) in the MMCIF.
The command response is shifted-in from the bit 0 in RSPR16, and shifted to the number of
command response bytes × 8 bits. Table 31.4 summarizes the correspondence between the number
of command response bytes and valid RSPR.
Rev. 3.00 Jan. 18, 2008 Page 1038 of 1458
REJ09B0033-0300