SH7720 Datasheet, PDF (1171/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 32 SSL Accelerator (SSL)
Section 32 SSL Accelerator (SSL)
SSL accelerator (SSL: Security Socket Layer) performs the RSA operation (RSA: Rivest Shamir
Adleman) with public key which is used to sign data with a digital signature, and encrypts or
decrypts the common key, DES (Data Encryption Standard), and Triple-DES that are used to
preserve secrecy of data in the network to perform efficient encryption communication.
With the RSA operation circuit, 32 to 512-bit width of addition, subtraction, and multiplication
and 512-bit width of macro operations as well as 512-bit width of RSA operation (modular
multiplication using multiple precision integers) are executed.
The SSL accelerator can use 56 bits or more encryption key. If to be exported or the like, the
necessary procedures must be taken according to the foreign exchange law. Please contact your
nearest Renesas Technology sales office when you require the detailed functional specification for
the SSL accelerator.
Rev. 3.00 Jan. 18, 2008 Page 1109 of 1458
REJ09B0033-0300