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SH7720 Datasheet, PDF (68/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Section 1 Overview
Item
Features
USB host
• Conforms to OHCI Rev. 1.0
controller (USBH) • USB Rev. 1.1 compatible
• 127 endpoints
• Support interrupt/bulk/control/isochronous mode
• Bus master controller (can access area 3 and synchronous DRAM)
• Two ports with analog transceiver (one is common with USB function
controller)
• External clock input function
USB function • Conforms to OHCI Rev. 1.0
controller (USBF) • Six endpoints
• Support interrupt/bulk/control/isochronous mode
• One port with analog transceiver (common with USB function controller),
12 Mbps only
• External clock input function
LCD controller
(LCDC)
• From 16 × 1 to 1024 × 1024 pixels can be supported
• 4/8/15/16 bpp (bit per pixel) color pallet
• 1/2/4/6 bpp (bit per pixel) gray scale
• 8-bit frame rate controller
• TFT/DSTN/STN panels
• Signal polarity setting function
• Hardware panel rotation
• Power control function
• Selectable clock source (LCLK, Bclk, or Pclk)
A/D converter
(ADC)
• 10 bits ± 4 LSB, four channels
• Conversion time: 15 µs
D/A converter
(DAC)
•
Input range: 0 to AV (max. 3.6 V)
CC
• 8 bits ± 4 LSB, two channels
• Conversion time: 10 µs
•
Output range: 0 to AV (max. 3.6 V)
CC
PC card
• Complies with the PCMCIA Rev.2.1/JEIDA Version 4.2
controller (PCC) • Supports the IC memory card interface and I/O card interface
Rev. 3.00 Jan. 18, 2008 Page 6 of 1458
REJ09B0033-0300