SH7720 Datasheet, PDF (689/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 18 Serial Communication Interface with FIFO (SCIF)
Initialization
Clear TE and RE bits in SCSCR to 0
Set RFRST bit in SCFCR to 1
1
Set CKE1 and CKE0 bits in SCSCR
(leaving TE and RE bits cleared to 0)
2
Set C/A bit in SCSMR to 1
Set CKS1 and CKS0 bits
3
Set value in SCBRR
4
1. Be sure to set the RFRST bit in
SCFCR to 1, to reset the FIFOs.
2. Set the clock selection in SCSCR.
Be sure to clear bits RIE, TIE, TE,
and RE to 0.
3. Set the clock source selection in
SCSMR.
4. Write a value corresponding to the
bit rate into SCBRR.
5. Clear the RFRST bit in SCFCR to 0.
6. Wait one bit interval.
Clear RFRST bit to 0
5
Wait
6
1-bit interval elapsed?
No
Yes
End
Figure 18.13 Sample SCIF Initialization Flowchart (2) (Reception)
Rev. 3.00 Jan. 18, 2008 Page 627 of 1458
REJ09B0033-0300