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SH7720 Datasheet, PDF (799/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
Section 22 Analog Front End Interface (AFEIF)
22.3.1 AFEIF Control Register 1 and 2 (ACTR1, ACTR2)
ACTR is the control register for AFEIF and is composed of ACTR1 and ACTR2. ACTR1 is
mainly used for FIFO control commands. ACTR2 is used for AFE control commands and DAA
control commands.
• ACTR1
Bit
Bit Name
15
HC
14 to 8 
7
DLB
6, 5

4
FFSZ2
3
FFSZ1
2
FFSZ0
Initial Value
0
All 0
0
All 0
0
0
0
R/W Description
R/W AFE Hardware Control
This bit controls AFE. AFE_HC1 signal is made
to high directly often the next serial transmit data
transfer, when this bit is written to 1. Then ACDR
data (AFE control word) is transferred by
founding the second AFE.FS. AFEIF module
automatically makes AFE_HC1 signal to low and
HC bit to 0, directly after transferring the AFE
control word. See section 22.4.2, AFE Interface
for more detail about AFE control sequences.
R Reserved
These bits are always read as 0. The write value
should always be 0.
R/W FIFO Digital Loop Back
0: Normal operation
1: Digital loop back between transmit FIFO and
receive FIFO is performed. In this time the
transmit data is output to AFE_TXOUT, too.
R Reserved
These bits are always read as 0. The write value
should always be 0.
R/W FIFO Interrupt Size Set 2 to 0
R/W Specifies the size of FIFO. FIFO size to generate
R/W interrupt (TFE, RFF, THE, and RHF) is assigned
as listed in table 22.2.
Rev. 3.00 Jan. 18, 2008 Page 737 of 1458
REJ09B0033-0300