SH7720 Datasheet, PDF (871/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 25 USB Function Controller (USBF)
Bit Bit Name Initial Value R/W Description
4
EP2
1
EMPTY
R EP2 (Bulk-in) FIFO Empty
[Setting conditions]
• When reset
• The FIFO buffer of EP2 has a dual-buffer
configuration, and this bit is set when at least one
of the FIFO buffer is empty.
[Clearing condition]
When both of FIFO buffers are not empty.
Note: EP2 EMPTY is a status bit, and cannot be
cleared.
3
SETUP TS 0
R/W Setup Command Receive Complete
[Setting condition]
When 8-byte data that decodes the command by the
function is normally received from the host to EP0s
and an ACK handshake is returned to the host from
the function.
[Clearing conditions]
• When reset
• When 0 is written to by CPU
2
EP0o TS 0
R/W EP0o Receive Complete
[Setting condition]
When data is normally received from the host to EP0o
and an ACK handshake is returned from the function
to the host.
[Clearing conditions]
• When reset
• When 0 is written to by CPU
1
EP0i TR 0
R/W EP0i Transfer Request
[Setting condition]
When IN token is issued from the host to EP0i and the
FIFO buffer is empty.
[Clearing conditions]
• When reset
• When 0 is written to by CPU
Rev. 3.00 Jan. 18, 2008 Page 809 of 1458
REJ09B0033-0300