SH7720 Datasheet, PDF (1140/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
• When the CRC error (CRCERI) or command timeout error (CTERI) occurs during command
response reception, write 1 to the CMDOFF bit.
• When the CRC error (CRCERI) or data timeout error (DTERI) occurs during the write data
transmission, write 1 to the CMDOFF bit.
Input/output pins
CLK
CMD
DAT
CMDSTRT
(START)
OPCR
(DATAEN)
(CMDOFF)
INTSTR0
(CMDI)
(CRPI)
CMD24 (WRITE_SINGLE_BLOCK)
Command
Command
response
Command
transmission
started
Write data
Status
Busy
(DTI)
(DRPI)
(DBSYI)
(FEI)
CSTR
(CWRE)
(BUSY)
(FIFO_EMPTY)
(DTBUSY)
(DTBUSY_TU)
Single block write command execution sequence
(REQ)
Figure 31.15 Example of Command Sequence for Commands with Write Data
(Block Size ≤ FIFO Size)
Rev. 3.00 Jan. 18, 2008 Page 1078 of 1458
REJ09B0033-0300