SH7720 Datasheet, PDF (180/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 3 DSP Operating Unit
3.5.2 DSP Operation Instruction Set
DSP operation instructions are instructions for digital signal processing performed by the DSP
unit. These instructions have a 32-bit instruction code, and multiple instructions can be executed
in parallel. The instruction code is divided into a field A and field B; a parallel data transfer
instruction is specified in the field A, and a single or double data operation instruction in the field
B. Instructions can be specified independently, and are also executed independently.
B-field data operation instructions are of three kinds: double data operation instructions,
conditional single data operation instructions, and unconditional single data operation instructions.
The formats of the DSP operation instructions are shown in table 3.17. The respective operands
are selected independently from the DSP registers. The correspondence between DSP operation
instruction operands and registers is shown in table 3.18.
Table 3.17 DSP Operation Instruction Formats
Type
Double data operation instructions
Conditional single data operation
instructions
Unconditional single data operation
instructions
Instruction Formats
ALUop. Sx, Sy, Du
MLTop. Se, Df, Dg
DCT ALUop. Sx, Sy, Dz
DCF ALUop. Sx, Sy, Dz
DCT ALUop. Sx, Dz
DCF ALUop. Sx, Dz
DCT ALUop. Sy, Dz
DCF ALUop. Sy, Dz
ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
ALUop. Sy, Dz
MLTop. Se, Sf, Dg
Rev. 3.00 Jan. 18, 2008 Page 118 of 1458
REJ09B0033-0300