SH7720 Datasheet, PDF (1134/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 31 MultiMediaCard Interface (MMCIF)
Command sequence start
FIFO clear
Write transfer block size to TBCR
Execute CMD16
Does CMD16 end ^No
successfully?
Yes
Execute CMD18 (CMDR to CMDSTRT)
Is CRCERI interrupt ^Yes
generated?
No
Is CRPI interrupt ^No
generated?
Yes
Read response register
Is response status ^No
normal?
Yes
No
Is CTERI interrupt
generated?
Yes
[1]
[2]
Figure 31.12 Operational Flowchart for Commands with Read Data
(Open-ended Multiblock Transfer) (1)
Rev. 3.00 Jan. 18, 2008 Page 1072 of 1458
REJ09B0033-0300