SH7720 Datasheet, PDF (457/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 9 Bus State Controller (BSC)
CKIO
A25 to A0
CExx
RD/WR
Read
Write
RD
D15 to D0
WE
D15 to D0
BS
WAIT
Tpcm0 Tpcm0w Tpcm1 Tpcm1w Tpcm1w Tpcm1w Tpcm1w Tpcm2 Tpcm2w
Figure 9.39 Wait Timing for PCMCIA Memory Card Interface
(TED[3:0] = B'0010, TEH[3:0] = B'0001, Software Wait = 1, Hardware Wait = 1)
If all 32 Mbytes of the memory space are used as an IC memory card interface, the REG signal
that switches between the common memory and attribute memory can be generated by an I/O port.
If the memory space used for the IC memory card interface is 16 Mbytes or less, the A24 pin can
be used as the REG signal by using the memory space as a 16-Mbyte common memory space and
a 16-Mbyte attribute memory space.
Rev. 3.00 Jan. 18, 2008 Page 395 of 1458
REJ09B0033-0300