SH7720 Datasheet, PDF (1015/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 28 D/A Converter (DAC)
Section 28 D/A Converter (DAC)
This LSI incorporates a two-channel D/A converter (DAC) with the following features.
28.1 Features
• 8-bit resolution
• Two output channels
• Conversion time: Max. 10 µs (when load capacitance is 20 pF)
• Output voltage: 0 V to AVcc (analog power supply)
Figure 28.1 shows the block diagram for the DAC.
AVcc
AVss
DA0
DA1
Analog I/O
buffer
DAO0
DAO1
8-bit D/A
converter
DADR0
DADR1
DACR
Control circuit
Peripheral
data bus
[Legend]
DACR: D/A control register
DADR0: D/A data register 0
DADR1: D/A data register 1
AVcc: Analog power supply
AVss: Analog ground
DAO0: Analog output 0
DAO1: Analog output 1
D/A converter circuit
Figure 28.1 Block Diagram of D/A Converter
Internal peripheral
clock (Pφ)
Rev. 3.00 Jan. 18, 2008 Page 953 of 1458
REJ09B0033-0300