SH7720 Datasheet, PDF (587/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 15 16-Bit Timer Pulse Unit (TPU)
Initial
Bit Bit Name Value R/W Description
5
TCFU
0
R/(W)* Underflow Flag
Status flag that indicates that TCNT underflow has occurred
when channels 2, and 3 are set to phase counting mode.
In channels 0 and 1, bit 5 is reserved. It is always read as 0
and cannot be modified.
[Clearing condition] (Initial value)
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to
H'FFFF)
4
TCFV
0
R/(W)* Overflow Flag
Status flag that indicates that TCNT overflow has occurred.
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to
H'0000)
3
TGFD
0
R/(W)* Compare Flag D
Status flag that indicates the occurrence of TGRD compare
match.
[Clearing conditions]
When 0 is written to TGFD after reading TGFD = 1
[Setting conditions]
When TCNT = TGRD
2
TGFC
0
R/(W)* Compare Flag C
Status flag that indicates the occurrence of TGRC compare
match.
[Clearing conditions]
When 0 is written to TGFC after reading TGFC = 1
[Setting conditions]
When TCNT = TGRC
Rev. 3.00 Jan. 18, 2008 Page 525 of 1458
REJ09B0033-0300