SH7720 Datasheet, PDF (546/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 13 Power-Down Modes
Initial
Bit
Bit Name Value R/W Description
1
MSTP31 0
R/W Module Stop Bit 31
When the MSTP31 bit is set to 1, the supply of the clock
to the USBH is halted.
0: USBH operates
1: Clock supply to USBH halted
0
MSTP30 0
R/W Module Stop Bit 30
When the MSTP30 bit is set to 1, the supply of the clock
to the USBF is halted.
0: USBF operates
1: Clock supply to USBF halted
13.3.4 Standby Control Register 4 (STBCR4)
STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power-
down mode.
Initial
Bit
Bit Name Value R/W Description
7, 6 
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
5
MSTP45 0
R/W Module Stop Bit 45
When the MSTP45 bit is set to 1, the supply of the clock
to the PCC is halted.
0: PCC operates
1: Clock supply to PCC halted
4
MSTP44 0
R/W Module Stop Bit 44
When the MSTP44 bit is set to 1, the supply of the clock
to the I²C is halted.
0: I²C operates
1: Clock supply to I²C halted
Rev. 3.00 Jan. 18, 2008 Page 484 of 1458
REJ09B0033-0300