SH7720 Datasheet, PDF (1256/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 35 I/O Ports
35.7.2 Port G Data Register (PGDR)
PGDR is a register that stores data for pins PTG6 to PTG0. Bits PG6DT to PG0DT correspond to
pins PTG6 to PTG0. When the pin function is general output port, if the port is read, the value of
the corresponding PGDR bit is returned directly. When the function is general input port, if the
port is read, the corresponding pin level is read.
Initial
Bit Bit Name Value R/W Description
7

0
R
Reserved
This bit is always read as 0. The write value should always
be 0.
6
PG6DT 0
R/W Table 35.7 shows the function of PGDR.
5
PG5DT 0
R/W
4
PG4DT 0
R/W
3
PG3DT 0
R/W
2
PG2DT 0
R/W
1
PG1DT 0
R/W
0
PG0DT 0
R/W
Table 35.7 Port G Data Register (PGDR) Read/Write Operations
PGCR State
PGnMD1 PGnMD0 Pin State
Read
Write
0
0
Other function PGDR value Value is written to PGDR, but does not affect
pin state.
1
Output
PGDR value Write value is output from pin.
1
0
Input (Pull-up Pin state
Value is written to PGDR, but does not affect
MOS on)
pin state.
1
Input (Pull-up Pin state
Value is written to PGDR, but does not affect
MOS off)
pin state.
Note: n = 0 to 6
Rev. 3.00 Jan. 18, 2008 Page 1194 of 1458
REJ09B0033-0300