SH7720 Datasheet, PDF (1259/1524 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

Section 35 I/O Ports
35.9 Port J
Port J is an input/output port with the pin configuration shown in figure 35.9. Each pin has an
input pull-up MOS, which is controlled by the port J control register (PJCR) in the PFC.
Port J
PTJ6 (input/output) / AUDCK (output)
PTJ5 (input/output) / ASEBRKAK (output)
PTJ4 (input/output) / AUDATA3 (output)
PTJ3 (input/output) / AUDATA2 (output)
PTJ2 (input/output) / AUDATA1 (output)
PTJ1 (input/output) / AUDATA0 (output)
PTJ0 (input/output) / AUDSYNC (output)
Figure 35.9 Port J
35.9.1 Register Description
Port J has the following register. Refer to section 37, List of Registers, for the address and access
size for this register.
• Port J data register (PJDR)
Rev. 3.00 Jan. 18, 2008 Page 1197 of 1458
REJ09B0033-0300