SH7059 Datasheet, PDF (95/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

1. Overview
Item
A/D converter
Multi-trigger A/D (MTAD)
High-performance user
debug interface (H-UDI)
Advanced user debugger
(AUD)
I/O ports (including timer
I/O pins, address and data
buses)
Features
• Thirty-two channels
• Three sample-and-hold circuits
⎯ Independent operation of 12 channels × 2 and 8 channels × 1
• Selection of two conversion modes
⎯ Single conversion mode
⎯ Scan mode
• Continuous scan mode
• Single-cycle scan mode
• Can be activated by external trigger or ATU-II compare-match
• 10-bit resolution
• Accuracy: ±2 LSB
• While performing conversion on the specified channels in scan mode, A/D conversion on the
channels for which conversion has been requested can be performed prior to the other
channels when a compare match occurs with respect to the timer in the A/D converter
• Compliant with IEEE1149.1
⎯ Five test signals (TCK, TDI, TD0, TMS, and TRST)
⎯ TAP controller
⎯ Instruction register
⎯ Data register
⎯ Bypass register
• Test mode compliant with IEEE1149.1
⎯ Standard instructions: BYPASS, SAMPLE/PRELOAD, EXTEST
⎯ Optional instructions: CLAMP, HIGHZ, IDCODE
• H-UDI interrupt
⎯ H-UDI interrupt request to INTC
• Eight dedicated pins
• RAM monitor mode
⎯ Data input/output frequency: 1/8 or less of the internal operating frequency (φ)
⎯ Possible to read/write to a module connected to the internal/external bus
• Branch address output mode
• Dual-function input/output pins: 149
• Schmitt input pins: NMI, IRQn, RES, HSTBY, FWE, TCLK, IC, IC/OC, SCK, ADTRG
• Input port protection
Rev.3.00 Mar. 12, 2008 Page 5 of 948
REJ09B0177-0300