SH7059 Datasheet, PDF (487/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16. Synchronous Serial Communication Unit (SSU)
Section 16 Synchronous Serial Communication Unit (SSU)
This LSI has two independent synchronous serial communication unit (SSU) channels. The SSU has a master mode in
which the LSI outputs a clock as a master device for synchronous serial communication. Synchronous serial
communication can be performed with devices having different clock polarity or clock phase. Figure 16.1 is a block
diagram of the SSU.
16.1 Features
• Support for master mode
• Synchronous serial communications with devices having a different clock phase or polarity
• Choice of 8/16/32-bit width of transmit/receive data
• Full-duplex communication capability
The shift register is incorporated, enabling transmission and reception to be executed simultaneously.
• Continuous serial communications
• Choice of LSB-first or MSB-first transfer
• Choice of a clock source
φ/4, φ/8, φ/16, φ/32, φ/64, φ/128, or φ/256
• Five interrupt sources
transmit-end, transmit-data-register-empty, receive-data-full, overrun-error, and conflict error
Rev.3.00 Mar. 12, 2008 Page 397 of 948
REJ09B0177-0300