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SH7059 Datasheet, PDF (725/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
23.9.1 Register Configuration
The port H register configuration is shown in table 23.15.
Table 23.15 Register Configuration
Name
Abbreviation
R/W
Port H data register
PHDR
R/W
Initial Value
H'0000
23. I/O Ports (I/O)
Address
H'FFFFF72C
Access Size
8, 16
23.9.2 Port H Data Register (PHDR)
Bit: 15
14
13
12
11
10
9
8
PH15 PH14 PH13 PH12 PH11 PH10 PH9 PH8
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PH7 PH6 PH5 PH4 PH3 PH2 PH1 PH0
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port H data register (PHDR) is a 16-bit readable/writable register that stores port H data. Bits PH15DR to PH0DR
correspond to pins PH15/D15 to PH0/D0.
When a pin functions as a general output, if a value is written to PHDR, that value is output directly from the pin, and if
PHDR is read, the register value is returned directly regardless of the pin state. When the POD pin is driven low, general
outputs go to the high-impedance state regardless of the PHDR value. When the POD pin is driven high, the written value
is output from the pin.
When a pin functions as a general input, if PHDR is read, the pin state, not the register value, is returned directly. If a
value is written to PHDR, although that value is written into PHDR, it does not affect the pin state. Table 23.16
summarizes port H data register read/write operations.
PHDR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), in hardware standby mode, and in
software standby mode. It is not initialized in sleep mode.
Table 23.16 Port H Data Register (PHDR) Read/Write Operations
Bits 15 to 0:
PHIOR
0
1
Pin Function
Read
General input
Pin state
Other than general input Pin state
General output
PHDR value
Other than general
output
PHDR value
Write
Value is written to PHDR, but does not affect pin state
Value is written to PHDR, but does not affect pin state
Write value is output from pin (POD pin = high)
High impedance regardless of PHDR value (POD pin =
low)
Value is written to PHDR, but does not affect pin state
Rev.3.00 Mar. 12, 2008 Page 635 of 948
REJ09B0177-0300