SH7059 Datasheet, PDF (834/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
Bit 0
SF
0
1
Description
Initialization has ended normally (no error)
Initialization has ended abnormally (error occurs)
(3) Programming Execution
When flash memory is programmed, the programming destination address on the user MAT must be passed to the
programming program in which the program data is downloaded.
1. The start address of the programming destination on the user MAT is set in general register R5 of the CPU. This
parameter is called FMPAR (flash multipurpose address area parameter).
Since the program data is always in 128-byte units, the lower eight bits (MOA7 to MOA0) must be H'00 or H'80 as
the boundary of the programming start address on the user MAT.
2. The program data for the user MAT must be prepared in the consecutive area. The program data must be in the
consecutive space which can be accessed by using the MOV.B instruction of the CPU and is not the flash memory
space.
When data to be programmed does not satisfy 128 bytes, the 128-byte program data must be prepared by
embedding the dummy code (H'FF).
The start address of the area in which the prepared program data is stored must be set in general register R4. This
parameter is called FMPDR (flash multipurpose data destination area parameter).
For details on the programming procedure, see section 25.5.2, User Program Mode.
(3.1) Flash multipurpose address area parameter (FMPAR: general register R5 of CPU)
This parameter indicates the start address of the programming destination on the user MAT.
When an address in an area other than the flash memory space is set, an error occurs.
The start address of the programming destination must be at the 128-byte boundary. If this boundary condition is not
satisfied, an error occurs. The error occurrence is indicated by the WA bit (bit 1) in FPFR.
Bit :
31
30
29
28
27
26
25
24
MOA31 MOA30 MOA29 MOA28 MOA27 MOA26 MOA25 MOA24
Bit :
23
22
21
20
19
18
17
16
MOA23 MOA22 MOA21 MOA20 MOA19 MOA18 MOA17 MOA16
Bit :
15
14
13
12
11
10
9
8
MOA15 MOA14 MOA13 MOA12 MOA11 MOA10 MOA9 MOA8
Bit :
7
6
5
4
3
2
1
0
MOA7 MOA6 MOA5 MOA4 MOA3 MOA2 MOA1 MOA0
• Bits 31 to 0—MOA31 to MOA0: Store the start address of the programming destination on the user MAT. The
consecutive 128-byte programming is executed starting from the specified start address of the user MAT. The MOA6
to MOA0 bits are always 0 because the start address of the programming destination is at the 128-byte boundary.
(3.2) Flash multipurpose data destination parameter (FMPDR: general register R4 of CPU)
This parameter indicates the start address in the area which stores the data to be programmed in the user MAT. When
the storage destination of the program data is in flash memory, an error occurs. The error occurrence is indicated by the
WD bit (bit 2) in FPFR.
Rev.3.00 Mar. 12, 2008 Page 744 of 948
REJ09B0177-0300