SH7059 Datasheet, PDF (123/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

2. CPU
Addressing Mode
Indirect GBR
addressing with
displacement
Instruction
Format
@(disp:8,
GBR)
Effective Address Calculation
The effective address is the GBR value plus an 8-bit
displacement (disp). The value of disp is zero-extended,
and remains the same for a byte operation, is doubled
for a word operation, and is quadrupled for a longword
operation.
Equation
Byte: GBR + disp
Word: GBR + disp × 2
Longword: GBR +
disp × 4
GBR
disp
+
(zero-extended)
×
GBR
+ disp × 1/2/4
Indirect indexed GBR @(R0, GBR)
addressing
1/2/4
The effective address is the GBR value plus R0.
GBR
+
GBR + R0
GBR + R0
R0
Indirect PC addressing @(disp:8, PC) The effective address is the PC value plus an 8-bit
Word: PC + disp × 2
with displacement
displacement (disp). The value of disp is zero-extended, _{Longword: PC &}
and is doubled for a word operation, and quadrupled for _{H'FFFFFFFC + disp ×}
a longword operation. For a longword operation, the lowest ₄
two bits of the PC value are masked.
PC
H'FFFFFFFC
disp
(zero-extended)
(for longword)
&
PC + disp × 2
+
or
PC & H'FFFFFFFC
+ disp × 4
×
2/4
Rev.3.00 Mar. 12, 2008 Page 33 of 948
REJ09B0177-0300